How old is Andy F Glew?

Andy F Glew is possibly 65 years old and maybe was born in September 1961.

Where does Andy F Glew live?

Andy F Glew has been associated with 3 addresses, the last known one is 616 Sw Arboretum Cir, Portland, Or 97221-2753.

What is Andy F Glew’s phone number?

Andy F Glew has been known to have 9 phone numbers, including (503) 649-4030.

What is Andy F Glew’s email address?

Andy F Glew has been known to have 17 email addresses, including xxxxxxxxx@asu.edu.

Who is Andy F Glew related to?

Andy F Glew's possible relatives include Laura Irene Irvan, Rhonda Sue Patten, Sophie Helen Patten Glew.

What does Andy F Glew do for a living?

Andy F Glew could be a Visiting Professor At Asum Stam Center at Arizona State University.

Did Andy F Glew go to school?

Andy F Glew could of attended University Of Illinois Urbana-champaign where Andy F Glew received a degree in Msee, Computer Architecture.

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Andy Glew

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Name

Andy Glew

Age

65

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AKA (Aliases, nicknames, alternate spellings, married and/or maiden names):

andrew f glew
andrew f glow
andrew forsyth glew
andrew patten glew
andrew patten glow
andy f glew

Possible Relatives

Associated Phone Numbers

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Associated Email Addresses

xxxxx@asu.edu
xxxxxx@asu.edu
xxxxxxxx@asu.edu
xxxxxxxxx@asu.edu

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Last Known Phone Numbers

(503) 649-4030 (Primary Phone)

landline

ziply fiber northwest llc dba ziply fiber

First Reported January 09, 2012

(503) 577-5274

mobile

cellco partnership dba verizon wireless - or (verizon wireless)

Jobs

Arizona State University

Education

Msee: Full-Time at Gould and Motorola While Taking Classes, Part-Time While Finishing Thesis.Invented Harrm, the Hardware Register Renaming Mechanism, Which Became the P6 Rat (And Which is Now the Renaming Technique Used by Most Modern Microprocessors - it was Supposed to be One of the &Quot;Big Innovations&Quot; in the Alpha Ev8/21464). {I Wish That i had Patented It.}Refined Ideas for Out-Of-Order Cpu Microarchitecture That Evolved Into the Intel P6.Ms Thesis was on &Quot;A Feature… Show More Msee: Full-Time at Gould and Motorola While Taking Classes, Part-Time While Finishing Thesis.Invented Harrm, the Hardware Register Renaming Mechanism, Which Became the P6 Rat (And Which is Now the Renaming Technique Used by Most Modern Microprocessors - it was Supposed to be One of the &Quot;Big Innovations&Quot; in the Alpha Ev8/21464). {I Wish That i had Patented It.}Refined Ideas for Out-Of-Order Cpu Microarchitecture That Evolved Into the Intel P6.Ms Thesis was on &Quot;A Feature Taxonomy of Synchronization Primitives, Including the Bus Abandonment Lock&Quot;. I.E. Multiprocessor Synchronization, Locking, and Cache Protocols.Pointed Out Livelock Problems with Risc Ll/Sc (Load Linked / Store Conditional), That i was Involved in Mitigating Circa 20-30 Years Later at Mips. Show Less
Activities and Societies: Hoofers Outing Club Pursued Ph.D. Cs, Computer Architecture, Under Prof. Guri Sohi. Intel Scholar. Returned to Intel When: (A) Daughter Born, (B) Promised New Project.Never Got MY Ph.D. :-(, Although i did Make Several Significant Advances in Computer Architecture :-), Including:(1) Hardware Performing Compiler Like Optimizations on the Fly, Such as Dynamic Instruction Rewriting and Instruction Refinement: Flattening / Dynamic Path Length Reduction / Hardware Parallel Prefix, and Dynamic Common… Show More Pursued Ph.D. Cs, Computer Architecture, Under Prof. Guri Sohi. Intel Scholar. Returned to Intel When: (A) Daughter Born, (B) Promised New Project.Never Got MY Ph.D. :-(, Although i did Make Several Significant Advances in Computer Architecture :-), Including:(1) Hardware Performing Compiler Like Optimizations on the Fly, Such as Dynamic Instruction Rewriting and Instruction Refinement: Flattening / Dynamic Path Length Reduction / Hardware Parallel Prefix, and Dynamic Common Sub-Expression Elimination.(2) Developed Mlp, Memory Level Parallelism, Concept, Including Hardware Skip Pointers for Linked Data Structures Using Space Freed UP in Cache Lines by Compression.(3) Developed Speculative Multithreading Microarchitectures (Imt/Dmt/Spmt/Skmt), Including Multicluster Multithreaded (Mcmt), Multilevel Schedulers, Trace Log Execution.(4) Multilevel Branch Predictorsalso: Perlsql, Agile/Xp. Show Less
Activities and Societies: Engineering Flag Football, Broomball, and Soccer: the Generators! Class Project: Seism, Small Efficient Instruction Set Machine: MY Own Take on Risc, Motivated by Ooo. Tools to Automatically Generate Instruction Set, Manuals, and Tools Such as Decoders and Disassemblers.

Last Known Address

616 SW Arboretum Cir
Portland, Oregon 97221

Multnomah

Past Addresses

Homes, rental properties, businesses, apartments, condos and/or other real estate associated with Andy Glew.

36 Parkhurst ST
Williams Bay, Wisconsin 53191
PO Box 105
Williams Bay, Wisconsin 53191

Job History

Andy Glew
Visiting Professor at Asum Stam Center

Arizona State University

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